ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products.
Main features:
- jitter performance - broadband and SONET specifications.
- phase noise performance.
- phase noise impact - ACI/ACR, EVM, phase jitter etc.
- jitter impact on ADC performance - SNR, ENOB. - accurate timing analysis (logic analyzer display).
Comments